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_______________ge ne ra l de sc ript ion the max742 dc-dc converter is a controller for dual -out- put power supplies in the 3w to 60w range. relying on simple two-terminal inductors rather than transform ers, the max742 regulates both outputs independently to with in 4% over all conditions of line voltage, temperatur e, and load current. the max742 has high efficiency (up to 92%) over a w ide range of output loading. two independent pwm curren t- mode feedback loops provide tight regulation and op era- tion free from subharmonic noise. the max742 can operate at 100khz or 200khz, so it can be used with small and lightweight external components. also ripple an d noise are easy to filter. the max742 provides a reg ulated output for inputs ranging from 4.2v to 10v (and hig her with additional components). external power mosfets driven directly from the max 742 are protected by cycle-by-cycle overcurrent sensing . the max742 also features undervoltage lockout, thermal shut- down, and programmable soft-start. if 3w of load power or less is needed, refer to the max743 data sheet for a device with internal power mosfets . ________________________applic a t ions dc-dc converter module replacement distributed power systems computer peripherals ____________________________fe a t ure s ? specs guaranteed for in-circuit performance ? load currents to 2a ? 4.2v to 10v input-voltage range ? switches from 15v to 12v under logic control ? 4% output tolerance max over temp, line, and load ? 90% typ efficiency ? low-noise, current-mode feedback ? cycle-by-cycle current limiting ? undervoltage lockout and soft-start ? 100khz or 200khz operation m ax 7 4 2 sw it c h-m ode re gula t or w it h +5 v t o 1 2 v or 1 5 v dua l out put ________________________________________________________________ maxim integrated products 1 max742 p r +5v input s -sense -drive pwm n r s +sense +drive -vo +vo pwm osc +2.0v vref cc+ cc- __________sim plifie d bloc k dia gra m 20 19 18 17 16 15 14 13 1 2 3 4 5 6 7 8 csh+ csl+ gnd ext+ av agnd cc+ fb+ top view pump pdrv ext- v+ ss vref 12/15 100/200 12 11 9 10 csh- csl- fb- cc- dip/so max742 __________________pin configura t ion 19-3105; rev 2; 8/96 part max742 cpp max742cwp max742c/d 0c to +70c 0c to +70c 0c to +70c temp. range pin-package 20 plastic dip 20 wide so dice* evaluation kit manual follows data sheet max742ewp max742mjp -55c to +125c -40c to +85c 20 wide so 20 cerdip max742epp -40c to +85c 20 plastic dip ______________orde ring i nform a t ion * contact factory for dice specifications for free samples & the latest literature: http://www.maxim-ic.com, or phone 1-800-998-8800 downloaded from: http:///
m ax 7 4 2 sw it c h-m ode re gula t or w it h +5 v t o 1 2 v or 1 5 v dua l out put 2 _______________________________________________________________________________________ absolute maximum ratings electrical characteristics (circuit of figure 2, +4.5v < v+ < +5.5v.) stresses beyond those listed under absolute maximu m ratings may cause permanent damage to the device . these are stress ratings only, and functional operation of the device at these or any other condi tions beyond those indicated in the operational sec tions of the specifications is not implied. exposur e to absolute maximum rating conditions for extended per iods may affect device reliability. v+, av+ to agnd, gnd............................... ..........-0.3v to +12v pdrv to v+ ......................................... ....................+0.3v to -14v fb+, fb- to gnd.................................... ..............................25v input voltage to gnd (cc+, cc-, csh+, csl+, csh-, csl-, ss, 100/200 , 12/15 ) ..................................-0.3v to (v+ + 0 .3v) output voltage to gnd (ext+, pump) ....................................... ...-0.3v to (v+ + 0.3v) ext- to pdrv....................................... .........-0.3v to (v+ + 0.3v) continuous power dissipation (any package) up to +70c ........................................ .............................500mw derate above +70c by .............................. ............100mw/c operating temperature ranges max742c_ _ ......................................... ..............0c to +70c max742e_ _ ......................................... ...........-40c to +85c max742mjp .......................................... ........-55c to +125c storage temperature range .......................... ...-65c to +150c lead temperature (soldering, 10sec) ................ .............+300c 0ma < i l < 100ma, 12/15 = 0v conditions 14.40 15.60 v 14.55 15.45 output voltage, 15v mode (notes 1, 2) units min typ max symbol parameter t a = +25c t a = t min to t max t a = +25c t a = t min to t max 0ma < i l < 125ma, 12/15 = v+ 11.52 12.48 v 11.64 12.36 output voltage, 12v mode (notes 1, 2) no ext- or pump load, fb+ = fb- = open circuit i load = 0ma to 100ma v+ = 4.5v to 5.5v, pdrv from pump csl+ = 0v, fb+ = open circuit ext+ or ext- 100/200 = v+ 100/200 = 0v csh- = v+, fb- = open circuit conditions mv 150 225 300 negative current-limit threshold (csh- to csl-) ma 3 no-load supply current mv 30 100 %/% 0.01 0.05 line regulation load regulation (note 2) mv 150 225 300 positive current-limit threshold (csh+ to csl+) % 85 90 duty-cycle limit (note 3) khz f osc /2 pump frequency khz 75 100 125 v 3.8 4.2 uvlo undervoltage lockout v 0.2 undervoltage lockout hysteresis v 2.0 reference output voltage 170 200 230 f osc oscillator frequency units min typ max symbol parameter v+ = 5v electrical characteristics (circuit of figure 2, v+ = 5v, 100/200 = 12/15 = 0v; t a = t min to t max , unless otherwise noted.) 10 v+ = 10v downloaded from: http:///
m ax 7 4 2 sw it c h-m ode re gula t or w it h +5 v t o 1 2 v or 1 5 v dua l out put _______________________________________________________________________________________ 3 note 1: devices are 100% tested to these limits under 0ma t o 100ma and to 125ma conditions using automatic tes t equipment. the ability to drive loads up to 1a is guaranteed b y the current-limit threshold, output swing, and th e output current source/sink tests. see figures 2 and 3. note 2: actual load capability of the circuit of figure 2 i s 200ma in 15v mode and 250ma in 12v mode. load regulation is tested at lower limits due to test equipment limita tions. note 3: guaranteed by design. note 4: measured at point a, circuit of figure 2, with pdrv disconnected. electrical characteristics (continued) (circuit of figure 2, v+ = 5v, 100/200 = 12/15 = 0v; t a = t min to t max , unless otherwise noted.) ext+, ext-, i l = -1ma, v+ = 4.5v, pdrv= -3v ext+, ext-, i l = 1ma, v+ = 4.5v, pdrv= -3v v+ = 3.8v, ss = 2v cc+, cc- v+ = 4.5v, pdrv = -3v, t a = +25c v+ = 4.5v, i l = -5ma, t a = +25c ss = 0v conditions ma -2 -0.5 soft-start sink current a 37 soft-start source current v -2.8 v ol v 4.3 v oh output voltage high output voltage low c 190 thermal-shutdown threshold k 10 compensation pin impedance ma 100 200 output sink current 200 350 v -3 pump output voltage (note 4) units min typ max symbol parameter ext+ = 4.5v ext- = 4.5v ext+ = 0v v+ = 4.5v, pdrv = -3v, t a = +25c ext- = -3v ma -200 -100 output source current -350 -200 ext+, c load = 2nf ns 70 output rise/fall time 100 ext-, c load = 4nf, pdrv = -3v downloaded from: http:///
m ax 7 4 2 sw it c h-m ode re gula t or w it h +5 v t o 1 2 v or 1 5 v dua l out put 4 _______________________________________________________________________________________ __________________________________________typic a l o pe ra t ing cha ra c t e rist ic s (circuit of figure 2, v+ = 5v, t a = +25c, unless otherwise noted.) 25 06 undervoltage lockout hysteresis 5 10 20 max742 -1 supply voltage (v) quiescent supply current (ma) 15 4 23 5 1 15v mode, 200khz mode lockout enabled -4.5 0 charge-pum p load regulation -2.5 -5.0 -3.0 -4.0 max742 -2 charge-pump load current (ma) charge-pump output voltage (v) -3.5 4 23 7 5 6 10 89 1 measured at point a v+ = 5v v+ = 4.5v 5 0 pdrv current vs. c ext- 1 6 2 4 max742 -3 capacitance at ext- (nf) pdrv current (ma) 3 4 23 1 pdrv forced to -4v pump disconnected 200khz 100khz 50 0 efficiency vs. load current, 22w circuit, 15v m ode 60 70 90 max742 -4 load current (ma) efficiency (% ) 80 800 400 600 1000 200 100khz 200khz circuit of figure 3, inductors = gowanda 121-at2502 (mpp core), q2 = two irf9z30 in parallel 15v mode 0 peak inductor current vs. load current 100 200 400 max742 -7 load current (ma) peak inductor current (ma) 300 500 700 600 800 1000 900 1100 1200 200 100 150 50 100khz 200khz measured at lx-, 15v mode 50 0 efficiency vs. load current, 6w circuit, 15v m ode 60 70 90 max742 -5 load current (ma) efficiency (% ) 80 200 100 150 250 50 100khz 200khz inductors = gowanda 050-at1003 (mpp core) 50 0 efficiency vs. load current, 6w circuit, 12v m ode 60 70 90 max742 -6 load current (ma) efficiency (% ) 80 300 150 225 75 100khz 200khz inductors = gowanda 050-at1003 (mpp core) 0 current-lim it threshold vs. soft-start voltage 50 100 200 max742 -8 soft-start voltage (v) current-limit threshold (mv) 150 3 12 downloaded from: http:///
m ax 7 4 2 sw it c h-m ode re gula t or w it h +5 v t o 1 2 v or 1 5 v dua l out put _______________________________________________________________________________________ 5 a = gate drive, 5v/div b = switch voltage, 10v/div c = switch current, 0.2a/div switching waveform s, inverting section a b c 2 m s/div _____________________________typic a l ope ra t ing cha r a c t e rist ic s (c ont inue d) (circuit of figure 2, i load = 100ma, unless otherwise noted.) a = gate drive, 5v/div b = switch voltage, 10v/div c = switch current, 0.2a/div switching waveform s, step-up section a b c 2 m s/div a = noise with i filter, 1mv/div b = noise without filter, 20mv/div measured at -v out v+ = 5v bw = 5mhz output-voltage noise, filtered and unfiltered a b 2 m s/div a = +vo, 20mv/div b = -vo, 50mv/div load-transient response a b 200 m s/div downloaded from: http:///
m ax 7 4 2 sw it c h-m ode re gula t or w it h +5 v t o 1 2 v or 1 5 v dua l out put 6 _______________________________________________________________________________________ ___________________________________________________ ___________pin de sc ript ion inverting compensation capacitor cc- 9 inverting section feedback input fb- 10 current-sense low (inverting section) csl- 11 current-sense high (inverting section) csh- 12 supply voltage input (+5v) v+ 13 selects oscillator frequency. ground for 200khz, or tie to v+ for 100khz. 100/200 5 selects v out . ground for 15v, or tie to v+ for 12v. 12/15 6 reference voltage output (+2.00v). force to gnd or v+ to disable chip. vref 7 soft-start timing capacitor (sources 5a) ss 8 analog supply voltage input (+5v) av+ 4 analog ground agnd 3 pin step-up compensation capacitor cc+ 2 step-up feedback input fb+ 1 function name charge-pump driverclock output at 1/2 oscillator f requency. pump 16 push-pull outputdrives external logic-level n-chan nel mosfet. ext+ 17 high-current ground gnd 18 current-sense low (step-up section) csl+ 19 current-sense high (step-up section) csh+ 20 push-pull outputdrives external p-channel mosfet. ext- 14 voltage inputnegative supply for p-channel mosfet driver. pdrv 15 ________________ope ra t ing princ iple each current-mode controller consists of a summing amplifier that adds three signals: the current wav eform from the power switch fet, an output-voltage error sig- nal, and a ramp signal for ac compensation generate d by the oscillator. the output of the summing amplif ier resets a flip-flop, which in turn activates the pow er fet driver stage (figure 1). both external transistor switches are synchronized to the oscillator and turn on simultaneously when the flip- flop is set. the switches turn off individually whe n their source currents reach a trip threshold determined b y the output-voltage error signal. this creates a dut y- cycle modulated pulse train at the oscillator frequ ency, where the on time is proportional to both the outpu t- voltage error signal and the peak inductor current. low peak currents or high output-voltage error signals result in a high duty cycle (up to 90% maximum). ac stability is enhanced by the internal ramp signa l applied to the error amplifier. this scheme elimina tes regenerative staircasing of the inductor current, which is otherwise a problem when in continuous current mode with greater than 50% duty cycle. downloaded from: http:///
_______________de t a ile d de sc ript ion 1 0 0 k h z/2 0 0 k h z osc illa t or the max742 oscillator frequency is generated withou t external components and can be set at 100khz or 200khz by pin strapping. operating the device at 100khz results in lower supply current and improved efficiency, particularly with light loads. however, com- ponent stresses increase and noise becomes more dif - ficult to filter. for a given inductor value, the l ower operating frequency results in slightly higher peak cur- rents in the inductor and switch transistor (see typical operating characteristics , peak inductor current vs. load current graph). when the lower frequency is us ed in conjunction with an lc-type output filter (optio nal components in figure 2), larger component values ar e required for equivalent filtering. cha rge -pum p v olt a ge i nve rt e r the charge-pump (pump) output is a rail-to-rail squ are wave at half the oscillator frequency. the square w ave drives an external diode-capacitor circuit to gener ate a negative dc voltage (point a in figure 2), which in turn biases the inverting-output drive stage via pdrv. t he charge pump thus increases the gate-source voltage applied to the external p-channel fet. the low on- resistance resulting from increased gate drive ensu res high efficiency and guarantees start-up under heavy loads. if a -5v to -8v supply is already available, it can be tied directly to pdrv and all of the charge-pump components removed. for input voltages greater than 8v, ground pdrv to prevent overvoltage. observe pdrv absolute maximum ratings. m ax 7 4 2 sw it c h-m ode re gula t or w it h +5 v t o 1 2 v or 1 5 v dua l out put _______________________________________________________________________________________ 7 max742 pulse square ramp osc 12/15 select vref soft-start and thermal shutdown s rq s to v+ rq ? ? agnd vref 12/15 cc- fb- cc+ fb+ csh+ csl+ v+ ext+ gnd ss pump ext- pdrv csh- csl- av+ 100/200 figure1. max742 detailed block diagram downloaded from: http:///
m ax 7 4 2 sw it c h-m ode re gula t or w it h +5 v t o 1 2 v or 1 5 v dua l out put 8 _______________________________________________________________________________________ max742 q2 q1 csh+ vin 4.5v to 6v* csl+ 1 j1 c2 3.3nf +vo optional d1 l3 25 m h l1 100 m h c8 150 m f c6 d4 d3 c9 150 m f c14 2.2 m f gnd ext+ pump pdrv ext- v+ csh- csl- c7 1 m f c13 0.1 m f disc ceramic c1 0.1 m f notes: q1 = motorola mtp15n05l q2 = motorola mtp12p05 l1, l2 = maxl001 c8c12 = maxc001 d1, d2 = 1n5817 d3, d4 = fuji era82-004 or 1n5817 r2, r3 = rcd rsf 1a metal film 3% l3, l4 = wilco mfb 250 r3 0.1 w c10 150 m f c3 10 m f r1 100 w c4 c5 3.3nf l2 100 m h -vo point a optional d2 l4 25 m h c11 150 m f c12 150 m f c15 2.2 m f 1 m f fb+ cc+ agnd av+ 100/200 12/15 vref * for higher input voltage, see supply-voltage range section. ss cc- fb- r2 0.16 w figure 2. standard 6w application circuit downloaded from: http:///
m ax 7 4 2 sw it c h-m ode re gula t or w it h +5 v t o 1 2 v or 1 5 v dua l out put _______________________________________________________________________________________ 9 max742 q2 q1 csh+ vin 4.5v to 6v* csl+ 1 j1 c2 6.8nf +vo d1 1n5820 l1 25 m h r2 0.02 w c8 1000 m f c6 d4 1n914 d3 1n914 c9 1000 m f gnd ext+ pump pdrv ext- v+ csh- csl- c7 1 m f c14 0.1 m f disc ceramic c1 0.1 m f notes: q1 = motorola mtp25n06l q2 = international rectifier irf9z30 l1, l2 = gowanda 121at2502vc r2, r3 = krl lb4-1 3% c8c13 = nichicon pl series (25v or 35v) r3 0.02 w c10 1000 m f 10v c3 10 m f r1 100 w c4 2.2 m f c5 6.8nf l2 25 m h -vo d2 1n5820 c11 1000 m f c12 1000 m f 1 m f fb+ cc+ agnd av+ 100/200 12/15 vref * for higher input voltage, see supply-voltage range section. ss cc- fb- c13 330 m f figure 3. high-power 22w application circuit downloaded from: http:///
m ax 7 4 2 sw it c h-m ode re gula t or w it h +5 v t o 1 2 v or 1 5 v dua l out put 10 ______________________________________________________________________________________ supply-v olt a ge ra nge although designed for operation from a +5v logic supply, the max742 works well from 4.2v (the upper limit of the undervoltage lockout threshold) to +10 v (absolute maximum rating plus a safety margin). the upper limit can be further increased by limiting th e voltage at v+ with a zener shunt or series regulato r. to ensure ac stability, the inductor value should b e scaled linearly with the nominal input voltage. for example, if figure 3s application circuit is power ed from a nominal 9v source, the inductor value should be increased to 40h or 50h. at high input voltages (>8v), the charge pump can cause overvoltage at pdrv. if the input can exceed 8v, ground pdrv and remove the capacitors and diodes associated with th e charge pump. i n-circ uit t e st ing for gua ra nt e e d pe rform a nc e figure 2s circuit has been tested at all extremes of line, load, and temperature. refer to the electrical characteristics table for guaranteed in-circuit specifica- tions. successful use of this circuit requires no c ompo- nent calculations. soft -st a rt a capacitor connected between soft-start (ss) and ground limits surge currents at power-up. as shown in the typical operating characteristics , the peak switch current limit is a function of the voltage at ss. s s is internally connected to a 5a current source and is diode-clamped to 2.6v (figure 8). soft-start timing is therefore set by the ss capacitor value. as the ss volt- age ramps up, peak inductor currents rise until the y reach normal operating levels. typical values for t he ss capacitor, when it is required at all, are in the r ange of 1f to 10f. fa ult condit ions ena bling ss re se t in addition to power-up, the soft-start function is enabled by a variety of fault conditions. any of the follow ing con- ditions will cause an internal pull-down transistor to dis- charge the ss capacitor, triggering a soft-start cy cle: undervoltage lockout thermal shutdown vref shorted to ground or supply vref losing regulation __________________de sign proc e dure i nduc t or v a lue an exact inductor value isnt critical. the inducto r value can be varied in order to make tradeoffs between noise, efficiency, and component sizes. higher indu ctor values result in continuous-conduction operation, w hich maximizes efficiency and minimizes noise. physicall y smallest inductors (where e = 1/2 li 2 is minimum) are realized when operating at the crossover point betw een continuous and discontinuous modes. lowering the inductor value further still results in discontinuo us cur- rent even at full load, which minimizes the output capacitor size required for ac stability by elimina ting the right-half-plane zero found in boost and invert ing topologies. ideal current-mode slope compensation where m = 2 x v/l is achieved if l (henries) = r sense ( ) x 0.001, but again the exact value isnt critic al and the inductor value can be adjusted freely to improv e ac performance. the following equations are given f or continuous-conduction operation since the max742 is mainly intended for low-noise analog power supplies . see appendix a in maxims battery management and dc-dc converter circuit collection for crossover point and discontinuous-mode equations. boost (positive) output: (v in - v sw ) 2 (v out + v d - v in ) l = (v out + v d ) 2 (i load )(f)(lir) inverting (negative) output: (v in - v sw ) 2 l = (v out + v d )(i load )(f)(lir) max742 n 8 external ss capacitor 5 m a +5v to current limit comparator fault ss +2v reference figure 4. soft-start equivalent circuit downloaded from: http:///
m ax 7 4 2 sw it c h-m ode re gula t or w it h +5 v t o 1 2 v or 1 5 v dua l out put ______________________________________________________________________________________ 11 where: v sw is the voltage drop across the the switch transisto r and current-sense resistor in the on state (0.3v ty p). v d is the rectifier forward voltage drop (0.4v typ). lir is the ratio of peak-to-peak ripple current to dc offset current in the inductor (0.5 typ). curre nt -se nse re sist or v a lue the current-sense resistor values are calculated ac cord- ing to the worst-case-low current-limit threshold v oltage from the electrical characteristics table and the peak inductor current. the peak inductor current calcula tions that follow are also useful for sizing the switches and specifying the inductor current saturation ratings. 150mv r sense = i peak i load (v out + v d ) +i peak (boost) = + v in - v sw (v in - v sw ) (v out + v d - v in ) (2)(f)(l)(v out + v d ) i load (v out + v d + v in ) +i peak (inverting) = + v in - v sw (v in - v sw ) (v out + v d + v in ) (2)(f)(l) (v out + v d ) filt e r ca pa c it or v a lue the output filter capacitor values are generally de ter- mined by the effective series resistance (esr) and volt- age rating requirements rather than actual capacita nce requirements for loop stability. in other words, th e capacitor that meets the esr requirement for noise pur- poses nearly always has much more output capaci- tance than is required for ac stability. output vol tage noise is dominated by esr and can be roughly calcu- lated by an ohms law equation: v noise (peak-to-peak) = i peak x r esr where v noise is typically 0.15v. ensure the output capacitors selected meet the foll ow- ing minimum capacitance requirements: minimum cf = 60f per output or the following, whic hev- er is greater: cf = 0.015/r load (in farads, 15v mode) cf = 0.01/r load (in farads, 12v mode) com pe nsa t ion ca pa c it or (cc) v a lue the compensation capacitors (cc+ and cc-) cancel the zero introduced by the output filter capacitors esr, improving phase margin, and ac stability. the com- pensation poles set by cc+ and cc- should be set to match the esr zero frequencies of the output filter capacitors according to the following: r esr x cf cc (in farads) = (use 1000pf minimum) 10k st a nda rd 6 w applic a t ion the 6w supply (figure 2) generates 200ma at 15v, or 250ma at 12v. output capability is increased t o 10w or more by heatsinking the power fets, using cores with higher current capability (such as gowan da #050at1003), and using higher filter capacitance. ferrite and mpp inductor cores optimize efficiency and size. iron-power toroids designed for high frequenc ies are economical, but larger. ripple is directly proportional to filter capacitor equiva- lent series resistance (esr). in addition, about 25 0mv transient noise occurs at the lx switch transitions . a very short scope probe ground lead or a shielded enclosure is need for making accurate measurements of transient noise. extra filtering, as shown in fi gure 2, reduces both noise components. h igh-pow e r 2 2 w applic a t ion the 22w application circuit (figure 3) generates 1 5v at 750ma or 12v at 950ma. noninductive wire- wound resistors with kelvin current-sensing connec- tions replace the metal-film resistors of the previ ous (6w) circuit. gate drive for the p-channel fet is b oot- strapped from the negative supply via diode d6. the 2.7v zener (d5) is required in 15v mode to prevent overvoltage. the charge pump (d3, d4, and c6) may not be necessary if the circuit is lightly loaded (<100ma) on start-up. aie part #415-0963 is a ferri te pot-core inductor that can be used in place of a sm all- er, more expensive moly-permalloy toroid inductor ( l1, l2). higher efficiencies can be achieved by adding extra mosfets in parallel. load levels above 10w make it necessary to add heatsinks, especially to t he p- channel fet. downloaded from: http:///
m ax 7 4 2 sw it c h-m ode re gula t or w it h +5 v t o 1 2 v or 1 5 v dua l out put 12 ______________________________________________________________________________________ table 1. trouble-shooting chart ___________________chip topogra phy gnd ext+ v+ ext- av+ pump pdrv 12/15 100/200 vref agnd cc+ fb+ csh+ csl+ csh- csl- cc- ss fb- 0. 135" (3. 45mm) 0. 080" (2. 03mm) transistor count: 375 substrate connected to v+ symptom correction output is unloaded. apply 30ma or greater load to observe waveform. no switching. vo are correct, but no waveform is seen at lx+ or lx-. a. check connections. vref should be +2v. b. when input voltage is less than +4.2v, undervoltage lockout is enabled. no output. +vo = 5v or less. -vo = 0v. a. inductor saturation: peak currents exceed coil ratings. b. mosfet on-resistance too high. c. switching losses: diode is slow or has high forward voltage. inductor has high dc resis- tance. excess capacitance at lx nodes. d. inductor core losses: hysteresis losses cause self-heating in some core materials. e. loop instability: see unstable output above. poor efficiency. supply current is high. output will not drive heavy loads. a. input overvoltage: never apply more than +12v. b. fb+ or fb- disconnected or shorted. this causes runaway and output overvoltage. c. cc+ or cc- shorted. d. output filter capacitor disconnected. self-destruction. transistors or ic die on power-up. a. ground noise: probe ground is picking up switching emi. reduce probe ground lead length (use probe tip shield) or put circuit in shielded enclosure. b. poor hf response: add ceramic or tantalum capacitors in parallel with output filter capacitors. noisy output. switching is steady, but large inductive spikes are seen at the outputs. loop stability problem. a. cc+ or cc- disconnected. b. emi: move inductor away from ic or use shielded inductors. keep noise sources away from cc- and cc+. c. grounding: tie agnd directly to the filter capacitor ground lead. ensure that cur- rent spikes from gnd do not cause noise at agnd or compensation capacitor or reference bypass ground leads. use wide pc traces or a ground plane. d. bypass: tie 10f or larger between agnd and vref. use 150f to bypass the input right at av+. if there is high source resis- tance, 1000f or more may be required. e. current limiting: reduce load currents. ensure that inductors are not saturating. f. slope compensation: inductor value not matched to sense resistor. unstable output. noise or jitter on output ripple waveform. scope may not trigger correctly. downloaded from: http:///

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